Optimization of Grain Boundary Structure and Dielectric Properties in SrTiO(3) Ceramics via Hot Isostatic Pressing.

This study fabricated SrTiO(3) grain boundary layer ceramics using hot isostatic pressing (HIP), achieving a remarkably high dielectric constant of 60,350 and a superior breakdown strength of 1722 kV/m. Microstructural characterization via scanning electron microscopy (SEM) and transmission electron microscopy (TEM) revealed that HIP treatment significantly refined grain size uniformity and homogenized bismuth distribution at grain boundaries, thus enhancing the interfacial barrier effect. Probe-based impedance spectroscopy elucidated the dielectric behavior and conduction mechanisms of individual grain boundaries. HIP promotes the formation of interfacial barrier layers (IBLs), significantly improving electrical performance. Compared to untreated samples (average breakdown strength: 555 kV/m), HIP-processed ceramics exhibited a threefold enhancement in breakdown strength (1722 kV/m). The treated ceramic exhibited excellent temperature stability, with TCC ≤8% over -55 to 125 °C. The optimized dielectric properties stem from HIP-induced structural modifications, including reduced oxygen vacancy concentrations and homogenized electronic distribution at grain boundaries. These findings establish a quantitative correlation between HIP parameters, grain boundary restructuring, and macroscopic performance, providing critical insights for designing high-energy-density dielectric materials.