Neuron Circuit Based on a Split-gate Transistor with Nonvolatile Memory for Homeostatic Functions of Biological Neurons

基于具有非易失性存储器的分栅晶体管的神经元电路,用于实现生物神经元的稳态功能

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Abstract

To mimic the homeostatic functionality of biological neurons, a split-gate field-effect transistor (S-G FET) with a charge trap layer is proposed within a neuron circuit. By adjusting the number of charges trapped in the Si(3)N(4) layer, the threshold voltage (V(th)) of the S-G FET changes. To prevent degradation of the gate dielectric due to program/erase pulses, the gates for read operation and V(th) control were separated through the fin structure. A circuit that modulates the width and amplitude of the pulse was constructed to generate a Program/Erase pulse for the S-G FET as the output pulse of the neuron circuit. By adjusting the V(th) of the neuron circuit, the firing rate can be lowered by increasing the V(th) of the neuron circuit with a high firing rate. To verify the performance of the neural network based on S-G FET, a simulation of online unsupervised learning and classification in a 2-layer SNN is performed. The results show that the recognition rate was improved by 8% by increasing the threshold of the neuron circuit fired.

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