Abstract
Spiking networks, as the third generation of neural networks, are of great interest today due to their low power consumption in cognitive processes. This important characteristic has caused the hardware implementation techniques of spiking networks in the form of neuromorphic systems attract a lot of attention. For the first time, the focus is on the digital implementation based on CORDIC approximation of the Hindmarsh-Rose (HR) neuron so that the hardware implementation cost is lower than previous studies. If the digital design of a neuron is done efficient, the possibility of implementing a population of neurons is provided for the feasibility of low-consumption implementation of high-level cognitive processes in hardware, which is considered in this paper through edge detector, noise removal and image magnification spiking networks based on the proposed CORDIC_HR model. While using less hardware resources, the proposed HR neuron model follows the behavior of the original neuron model in the time domain with much less error than previous study. Also, the complex nonlinear behavior of the original and the proposed model of HR neuron through the bifurcation diagram, phase space and nullcline space analysis under different system parameters was investigated and the good follow-up of the proposed model was confirmed from the original model. In addition to the fact that the individual behavior of the original and the proposed neurons is the same, the functional and behavioral performance of the randomly connected neuronal population of original and proposed neuron model is equal. In general, the main contribution of the paper is in presenting an efficient hardware model, which consumes less hardware resources, follows the behavior of the original model with high accuracy, and has an acceptable performance in image processing applications such as noise removal and edge detection.