Demonstration of Anti-ambipolar Switch and Its Applications for Extremely Low Power Ternary Logic Circuits

反双极性开关及其在超低功耗三进制逻辑电路中的应用演示

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Abstract

Anti-ambipolar switch (AAS) devices at a narrow bias region are necessary to solve the intrinsic leakage current problem of ternary logic circuits. In this study, an AAS device with a very high peak-to-valley ratio (∼10(6)) and adjustable operating range characteristics was successfully demonstrated using a ZnO and dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene heterojunction structure. The entire device integration was completed at a low thermal budget of less than 200 °C, which makes this AAS device compatible with monolithic 3D integration. A 1-trit ternary full adder designed with this AAS device exhibits excellent power-delay product performance (∼122 aJ) with extremely low power (∼0.15 μW, 7 times lower than the reference circuit) and lower device count than those of other ternary device candidates.

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