FPGA based implementation of a perturbed Chen oscillator for secure embedded cryptosystems

基于FPGA的扰动陈氏振荡器实现,用于安全嵌入式密码系统

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Abstract

This paper introduces an enhancement to the Chen chaotic system by incorporating a constant perturbation term d to one of the state variables, aiming to improve the performance of pseudo-random number generators (PRNGs). The perturbation significantly enhances the system's chaotic properties, resulting in superior randomness and increased security. An FPGA-based realization of a perturbed Chen oscillator (PCO)-derived PRNG is presented, tailored for embedded cryptosystems and implemented on a Nexys 4 FPGA card featuring the XILINX Artix-7 XC7A100T-1CSG324C integrated chip. The Xilinx-based system generator (XSG) tool is utilized to generate a digital version of the new oscillator, minimizing resource utilization. Experimental results demonstrate that the PCO-generated data successfully passes the NIST and TestU01 test suites. Additionally, statistical tests with key sensitivity are performed, validating the suitability of the designed PRNG for cryptographic applications. This establishes the PCO as a straightforward and efficient tool for multimedia security.

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