A 30% Efficient High-Output Voltage Fully Integrated Self-Biased Gate RF Rectifier Topology for Neural Implants

一种用于神经植入的30%效率高输出电压全集成自偏置栅极射频整流器拓扑结构

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Abstract

This paper presents a fully integrated RF energy harvester (EH) with 30% end-to-end power harvesting efficiency (PHE) and supports high output voltage operation, up to 9.3V, with a 1.07 GHz input and under the electrode model for neural applications. The EH is composed of a novel 10-stage self-biased gate (SBG) rectifier with an on-chip matching network. The SBG topology elevates the gate-bias of transistors in a non-linear manner to enable higher conductivity. The design also achieves >20% PHE range of 12-dB. The design was fabricated in 65 nm CMOS technology and occupies an area of 0.0732-mm(2) with on-chip matching network. In addition to standalone EH characterization measurement results, animal tissue stimulation test was performed to evaluate its performance in a realistic neural implant application.

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