A 3.3 kV SiC Semi-Superjunction MOSFET with Trench Sidewall Implantations

具有沟槽侧壁注入的 3.3 kV SiC 半超结 MOSFET

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Abstract

Superjunction (SJ) technology offers a promising solution to the challenges faced by silicon carbide (SiC) Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs) operating at high voltages (>3 kV). However, the fabrication of SJ devices presents significant challenges due to fabrication complexity. This paper presents a comprehensive analysis of a feasible and easy-to-fabricate semi-superjunction (SSJ) design for 3.3 kV SiC MOSFETs. The proposed approach utilizes trench etching and sidewall implantation, with a tilted trench to facilitate the implantation process. Through Technology Computer-Aided Design (TCAD) simulations, we investigate the effects of the p-type sidewall on the charge balance and how it affects key performance characteristics, such as breakdown voltage (BV) and on-state resistance (R(DS-ON)). In particular, both planar gate (PSSJ) and trench gate (TSSJ) designs are simulated to evaluate their performance improvements over conventional planar MOSFETs. The PSSJ design achieves a 2.5% increase in BV and a 48.7% reduction in R(DS-ON), while the TSSJ design further optimizes these trade-offs, with a 3.1% improvement in BV and a significant 64.8% reduction in R(DS-ON) compared to the benchmark. These results underscore the potential of tilted trench SSJ designs to significantly enhance the performance of SiC SSJ MOSFETs for high-voltage power electronics while simplifying fabrication and lowering costs.

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