Abstract
Electromigration (EM) is a critical reliability issue in integrated circuits and is becoming increasingly significant as fabrication technology nodes continue to advance. The analysis of the hydrostatic stress, which is paramount in electromigration studies, typically involves solving complex physical equations (partial differential equations, or PDEs in this case), which is time consuming, inefficient and not practical for full-chip EM analysis. In this paper, a novel approach is proposed, conceptualizing circuit interconnect trees as a graph within a graph neural network framework. Using finite element solution software, ground truth hydrostatic stress values were obtained to construct a dataset of interconnected trees with hydrostatic stress values for each node. An improved Graph Convolutional Network (GCN) augmented with edge feature aggregation and attention mechanism was then trained employing the dataset, yielding a model capable of predicting hydrostatic stress values for nodes in an interconnect tree. The results show that our model demonstrated a 15% improvement in the Root Mean Square Error (RMSE) compared to the original GCN model and improved the solution speed greatly compared to traditional finite element software.