Enhanced soft error resilience of NBTI-tolerant dual mode Schmitt trigger circuit

增强了容错双模施密特触发器电路的软错误容错能力

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Abstract

A dual-mode inverting Schmitt trigger (DM-IST) circuit is presented. The proposed DM-IST circuit is configured with a single PMOS in pull-up and five NMOS in pull-down networks to reduce the effect of negative bias temperature instability (NBTI) on the circuit. Owing to NBTI, the increase in threshold voltage ([Formula: see text]) shift for the proposed DM-IST circuit is only 1.43× in comparison to the conventional Schmitt trigger after the stress time of 10 years. The [Formula: see text] and leakage current of DM-IST is estimated mathematically with respect to conventional design. It is observed that the proposed circuit has a hysteresis width of 1.39× improved than the conventional Schmitt trigger. Further, this work has been extended to analyze the effect of radiation by injecting a double exponential current. The critical charge, threshold current and area of the proposed DM-IST circuit is 2.89×, 2.02× and 2.44× of the conventional circuit. Other performance metrics, such as dynamic power, leakage power, propagation delay, and power delay product are improved by 2.94×, 1.89×, and 1.60×, and 4.71× respectively, compared to the conventional Schmitt trigger circuit. While Control unit is tuned from 0.6V to 1V by varying input and supply voltage together, the critical charge and hysteresis width is observed. All these analysis reveal that the proposed DM-IST circuit is more efficient, with enhanced noise immunity and the capability for reliable operation in radiation-induced environments over the long term. All simulation work has been performed using 40 nm UMC technology using the Cadence Virtuoso tool.

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