Design and Implementation of a Low-Noise Analog Front-End Circuit for MEMS Capacitive Accelerometers

用于MEMS电容式加速度计的低噪声模拟前端电路的设计与实现

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Abstract

This paper presents a low-noise analog front-end (AFE) integrated circuit (IC) circuit for capacitive micro-electromechanical system (MEMS) accelerometers that can be used for optical image stabilization (OIS) in various optical imaging systems. The AFE circuit design features a fully differential chopper stabilization technique that efficiently minimizes low-frequency 1/f noise and parasitic coupling. The AFE circuit chip is fabricated in a 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology and co-packaged with an x-axis capacitive MEMS accelerometer based on a silicon-on-glass (SOG) process. The SOG accelerometer has a footprint of 1000 μm × 950 μm. The packaged system demonstrates a sensitivity of 342 mV/g and a nonlinearity of 1.1% between -1 g and +1 g, a dynamic range of 88 dB, and an equivalent noise floor of 14 μg/Hz.

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