Design of a Bandgap Reference Circuit for MEMS Integrated Accelerometers

用于MEMS集成加速度计的带隙基准电路设计

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Abstract

To meet the requirements of integrated accelerometers for a high-precision reference voltage under wide supply voltage range, high current drive capability, and low power consumption, this paper presents a bandgap reference operational amplifier (op-amp) circuit implemented in CMOS/BiCMOS technology. The proposed design employs a folded-cascode input stage, a push-pull Class-AB output stage, an adaptive output switching mechanism, and a composite frequency compensation scheme. In addition, overcurrent protection and low-frequency noise suppression techniques are incorporated to balance low static power consumption with high load-driving capability. Simulation results show that, under the typical process corner (TT), with VDD = 3 V and T = 25 °C, the op-amp achieves an output swing of 0.2 V~2.8 V, a low-frequency gain of 102~118 dB, a PSRR of 90 dB at 60 Hz, overcurrent protection of ±25 mA, and a phase margin exceeding 48.8° with a 10 μF capacitive load. Across the entire supply voltage range, the static current remains below 150 μA, while maintaining a line regulation better than 150 μV/V and a load regulation better than 150 μV/mA. These results verify the feasibility of achieving both high drive capability and high stability under stringent power constraints, making the proposed design well-suited as a bandgap reference buffer stage for integrated accelerometers, with strong engineering practicality and potential for broad application.

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