Heterogeneous integration of 2D memristor arrays and silicon selectors for compute-in-memory hardware in convolutional neural networks

卷积神经网络中用于内存计算硬件的二维忆阻器阵列和硅选择器的异构集成

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Abstract

Memristor crossbar arrays (CBAs) based on two-dimensional (2D) materials have emerged as a potential solution to overcome the limitations of energy consumption and latency associated with conventional von Neumann architectures. However, current 2D memristor CBAs encounter specific challenges such as limited array size, high sneak path current, and lack of integration with peripheral circuits for hardware compute-in-memory (CIM) systems. In this work, we demonstrate a hardware CIM system leveraging heterogeneous integration of scalable 2D hafnium diselenide (HfSe(2)) memristors and silicon (Si) selectors, as well as their integration with peripheral control-sensing circuits. The 32 × 32 one-selector-one-memristor (1S1R) array mitigates sneak current, achieving 89% yield. The integrated CBA demonstrates an improvement of energy efficiency and response time comparable to state-of-the-art 2D materials-based memristors. To take advantage of low latency devices for achieving low energy systems, we use time-domain sensing circuits with the CBA, whose power consumption surpasses that of analog-to-digital converters (ADCs) by 2.5 folds. The implemented full-hardware binary convolutional neural network (CNN) achieves remarkable accuracy (97.5%) in a pattern recognition task. Additionally, in-built activation functions enhance the energy efficiency of the system. This silicon-compatible heterogeneous integration approach presents a promising hardware solution for artificial intelligence (AI) applications.

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