Wafer-scale platform for on-chip 3D radio frequency lumped passive components using metal self-rolled-up membrane technique

采用金属自卷曲膜技术的晶圆级片上三维射频集总无源器件平台

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Abstract

A wafer-scale metal self-rolled-up membrane platform has been proposed for the design and fabrication of radio-frequency on-chip lumped passive components, which is demonstrated on a commercial 4-inch sapphire batch fabrication line. Compared to the traditional methodology including planar or SiN(x) based self-rolled-up membrane processing technologies to obtain the most basic passive lumped components, such as inductors and capacitors on the chip, this platform enables more compact three-dimensional construction of the component device structure with higher electrical performance. For demonstration, batches of wafer-scale RF inductors and capacitors are fabricated through precise design based on electromagnetic analysis. Measurement results show that radio-frequency inductor samples obtain inductance of 0.6 nH~3.4 nH and a maximum quality factor of 3.1 ~ 7.3 with the largest inductance density of 2.26 μH/mm2 , and a typical RF capacitor sample show capacitance of 0.5 pF with the largest capacitance density of 1528.4 pF/mm2 . After post electroplating, coper layer thickness of a 1.1 nH inductor is increased to be ~ 2.7 μm from 120 nm with the inner diameter of 80 μm, and the maximum quality factor is significantly increased to 18 @ 1.4 GHz. Standalone inductors can be successfully cut off from a 4-inch sapphire wafer by using laser modification cutting.

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