Abstract
The Physical Unclonable Function (PUF) is a security mechanism that generates secret keys by capitalizing on inherent physical variations in a device to produce a distinctive response. Given the prevalent incorporation of power management units (PMUs) in current System-on-Chip devices to meet the rising demands for energy efficiency and optimal power utilization, this study proposes the utilization of existing components, specifically the voltage regulator within the PMU, to enhance the PUF. The system has been designed in 22-nm FDSOI technology. The statistical analyses are founded on silicon measurements comprising 8K challenge-response pairs obtained from three distinct chips. It reveals that the proposed system attains a 50% diffuseness, indicating an improvement of approximately 31%, while achieving a relatively consistent 48% uniformity when compared to stand alone PUF. Moreover, the system exhibits higher resiliency against machine learning-based modeling attacks, as evidenced by a prediction accuracy of 50.5% in comparison to the 67.1% reported in the stand alone employed PUF implementation.