Abstract
This paper presents the first implementation of 100-nm-wide nanofluidics in a 65-nm CMOS chip using a one-step wet-etch to remove the copper routing from the back-end-of-line (BEOL) while maintaining transistor integrity through continuous monitoring of the I(DS)-V(GS) characteristics. Vertical fluidics are also successfully demonstrated by etching through 360 nm × 360 nm-sized vias. A non-destructive laser microscopy technique for imaging fluidic channels at a dimension below the visible-light wavelength is developed.