Abstract
Transition Metal Dichalcogenides (TMDC) are promising candidates for future scaled transistor channels but their performance is often degraded by imperfections such as the interface with amorphous gate oxides. This study examines how amorphous Al(2)O(3) and HfO(2) interfaces affect monolayer to trilayer MoS(2) transistors using first principles simulations. We link atomic-scale features of their surfaces to experimentally observed performance degradation in TMDC device performance. Our findings show that atomic-scale variations of the dielectric environment cause potential fluctuations in the TMDC that reduce mobility and drive current while increasing subthreshold swing (SS) in short channel devices. Additionally, surface defects in the oxides introduce gap states that act as traps, causing source-to-drain leakage currents and further SS degradation. Notably, mobility drops less in trilayer than in mono- and bilayer MoS(2), consistent with experiments showing that thicker layers are more resilient to oxide-induced performance degradation. Nonetheless, monolayer MoS(2) models with homogeneous, defect-free amorphous oxide surfaces can retain up to 80% of the on-current of an ideal crystalline oxide. These insights help optimize oxide interfaces to preserve device performance in TMDC-based transistors.