Abstract
Single UIS and repetitive UIS experiments are performed in this article to expound physical failure mechanisms in P-GaN HEMT devices. V(peak) and I(peak) are used as metrics to evaluate the degradation of electrical parameters. In the single UIS tests, different load inductors, off-gate voltages, and ambient temperatures are chosen as variables to observe the failure phenomena in the device under test (DUT), while in the repeated UIS tests, the threshold voltage, on-state resistance, blocking characteristics, and gate leakage current degradation and recovery are analyzed, and it is concluded that Vth presents a negative shift, R(on) and BV are restored to their initial value, and gate leakage shows a significant reduction at first and then, after a duration of lagging, gradually recovers to some extent, but is unable to achieve its initial value. Combining failure point analysis via decapping with TCAD simulation and validation, it is found that hole trapping and detrapping in the p-GaN region dominate Vth and Igss degradation, while electron traps in the buffer dominate R(on) and BV degradation.