Abstract
This study proposed an innovative method for growing gate oxide on silicon carbide (SiC), where silicon oxide (SiO(2)) was fabricated on a deposited Al(2)O(3) layer, achieving high quality gate oxide. A thin Al(2)O(3) passivation layer was deposited via atomic layer deposition (ALD), followed by Si deposition and reoxidation to fabricate a MOS structure. The effects of different ALD growth cycles on the interface chemical composition, trap density, breakdown characteristics, and bias stress stability of the MOS capacitors were systematically investigated. X-ray photoelectron spectroscopy (XPS) analyses revealed that an ALD Al(2)O(3) passivation layer with 10 growth cycles effectively suppresses the formation of the proportion of Si-O(x)C(y) bonds. Additionally, the SiO(2)/Al(2)O(3)/SiC gate stack with 10 ALD growth cycles exhibited optimal electrical properties, including a minimum interface state density (D(it)) value of 3 × 10(11) cm(-2) eV(-1) and a breakdown field (E(bd)) of 10.9 MV/cm. We also systematically analyzed the bias stress stability of the capacitors at room temperature and elevated temperatures. Analysis of flat-band voltage (ΔV(fb)) and midgap voltage (ΔV(mg)) hysteresis after high-temperature positive and negative bias stress demonstrated that incorporating a thin Al(2)O(3) layer at the interface is the key factor in enhancing the stability of V(fb) and midgap voltage V(mg).