Abstract
Understanding the mechanism of stress concentration effects on the surface of semiconductor substrate materials-silicon wafers-in Double-Sided Polishing (DSP) is particularly important for improving polishing quality. In this study, a two-dimensional finite element model is established to study the effect of contact state and stress concentration during polishing on edge roll-off (ERO) and polishing rate uniformity. The variation in this contact state is influenced by changes in wafer thickness and the gap between it and the carrier. The model is validated by experiments and helps to further analyze and interpret the experimental results, identifying six stages of contact states during the polishing process. The research indicates that the phenomenon of stress concentration at the edge of a wafer is caused by the pads creating a large amount of compression at the edge of the wafer. Additionally, there appears to be a threshold value during the polishing process, below which the stress concentration on the wafer changes, thereby altering the magnitude of edge roll-off and, ultimately, affecting overall flatness. This study provides a basis for optimizing the process design.