Efficient computation and design of high speed double precision Vedic multiplier architecture
高效计算和设计高速双精度吠陀乘法器架构
期刊:Scientific Reports
影响因子:3.9
doi:10.1038/s41598-026-38147-w
Kumar, Aruru Sai; Sahitya, G; Kusuma, Rambabu; Krishna, M Sankush; Reddy, B Naresh Kumar; Tripathi, Suman Lata
