Correction: Hsieh et al. Single-Grain Gate-All-Around Si Nanowire FET Using Low-Thermal-Budget Processes for Monolithic Three-Dimensional Integrated Circuits. Micromachines 2020, 11, 741
更正:Hsieh 等人,《采用低热预算工艺的单晶粒全环栅硅纳米线场效应晶体管用于单片三维集成电路》,Micromachines 2020, 11, 741
期刊:Micromachines
影响因子:3
doi:10.3390/mi16050537
Hsieh, Tung-Ying; Hsieh, Ping-Yi; Yang, Chih-Chao; Shen, Chang-Hong; Shieh, Jia-Min; Yeh, Wen-Kuan; Wu, Meng-Chyi