Abstract
Oxide semiconductors have emerged as critical channel materials for advanced display and next-generation memory technologies, offering superior electron mobility, excellent uniformity, and low-temperature processability. Despite successful commercialization in display backplanes since 2012, their broader adoption remains limited by an inherent trade-off between carrier mobility and device stability—a fundamental challenge arising from the complex interplay between conduction band dispersion and defect chemistry. The development of strategies to overcome this trade-off has therefore become essential for realizing high-performance oxide semiconductor devices in emerging applications. In this review, a comprehensive data-driven analysis of the mobility-stability trade-off in oxide semiconductor thin-film transistors is presented through large language model-powered extraction of over 1,000 experimental datasets from literature. First, the methodology for systematic data extraction and the quantitative visualization of the mobility-stability relationship are introduced. Then, the critical roles of channel composition, gate insulator selection, and post-deposition annealing temperature in determining device performance are statistically analyzed through kernel density estimation and correlation studies. Next, the temporal evolution of process technologies from 2003 to 2025 is examined, revealing progressive improvements in both mobility and stability through advanced strategies. Afterward, detailed case studies of outlier devices—those successfully transcending the conventional trade-off—are presented, identifying key breakthrough approaches including multi-channel architectures, crystallinity engineering, hybrid gate dielectrics, and interface optimization. The superior performance of atomic layer deposition compared to physical vapor deposition methods is demonstrated through comparative analysis. Finally, the implications of this data-driven framework for accelerating materials development are discussed, and future perspectives on leveraging AI-assisted analysis for semiconductor research are provided. GRAPHICAL ABSTRACT: [Image: see text] SUPPLEMENTARY INFORMATION: The online version contains supplementary material available at 10.1186/s40580-026-00535-3.