Abstract
Lead-free halide-perovskite memristors have advanced rapidly from initial proof-of-concept junctions to centimeter-scale selector-free crossbar arrays, maintaining full compatibility with CMOS backend processes. In these highly interconnected matrices, surface passivation, strain-relief interfaces, and non-toxic B-site substitutions successfully reduce sneak currents and stabilize resistance states. The Introduction section lays out the structural and functional basis, detailing phase behavior, bandgap tunability, and tolerance-factor-guided crystal design within Ruddlesden-Popper, Dion-Jacobson, vacancy-ordered, and double-perovskite frameworks, each of which is evaluated for its ability to confine filaments and reduce crosstalk in crossbar configurations. The following sections examine the characteristics of charge transport and the dynamics of ion migration, followed by a detailed outline of chemical and mechanical stabilization strategies in response to the high current densities and heat fluxes typical of large-area crossbars. The comparison of solution, vapor, and solid-state synthesis routes focuses on aspects such as film uniformity, grain-boundary control, and compatibility with flexible or heterogeneous substrates, all evaluated against the demanding uniformity requirements of multilevel crossbar programming. The principles of resistive switching and array architecture are elaborated upon, emphasizing the three-dimensional (3D) stacking of selector-integrated vertical nanowires and hybrid photonic-memristive layers as promising approaches to enhance bandwidth and reduce energy consumption per operation. By integrating sustainable chemistry with scalable crossbar engineering, these memories are set to provide ultra-dense, energy-efficient hardware that meets the performance demands of contemporary artificial intelligence accelerators while adhering to new regulations on hazardous materials in electronic devices.