Ferroelectricity-modulated asymmetric van der Waals heterostructure for ultralow-power neuromorphic synapse and logic-in-memory operations

用于超低功耗神经形态突触和内存逻辑运算的铁电调制非对称范德华异质结构

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Abstract

Vertical integration of two-dimensional materials holds tremendous potential for integrated sensing, memory, and computing applications, yet it still confronts challenges such as single device functionality, limited in-memory logic capability, and high power consumption. To address these issues, we propose an asymmetric van der Waals integration strategy based on an In₂Se₃/MoOₓ/MoS₂/graphene heterojunction, which integrates five reconfigurable logic gates (AND, OR, NOT, NOR, and NAND), dual-mode photodetection (~10 fA dark current, a high responsivity of 89.3 mA/W and a specific detectivity of 1.4 × 10¹¹Jones), and low-power neurosynaptic functions (7-bit conductance states, subfemtojoule energy consumption) into a single device. By virtue of these characteristics, the device enables high-precision image recognition, simulation of classical Pavlovian conditioning and single-pixel dual-band optical imaging. This work paves a feasible path for the development of multifunctionally integrated sensor-memory-computing devices.

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